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Alif Semiconductor /AE302F80F55D5AE_CM55_HE_View /CSI /CSI_PHY_STOPSTATE

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Interpret as CSI_PHY_STOPSTATE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PHY_STOPSTATEDATA_0)PHY_STOPSTATEDATA_0 0 (PHY_STOPSTATEDATA_1)PHY_STOPSTATEDATA_1 0 (PHY_STOPSTATECLK)PHY_STOPSTATECLK

Description

PHY STOPSTATE Signal Status Register

Fields

PHY_STOPSTATEDATA_0

Data lane 0 in Stop state.
PHY_STOPSTATEDATA_1

Data lane 1 in Stop state.
PHY_STOPSTATECLK

D-PHY Clock lane in Stop state.

Links

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data